ALU Design
Functional Specification of the ALU
ALU Control Lines (ALUop) Function

000 And

001 Or

010 Add

110 Subtract
A One Bit ALU
This 1bit ALU will perform AND, OR, and ADD
A Onebit Full Adder
A 4bit ALU
What About Subtraction?
(A  B) is the same as: A + (B)
2's Complement: Take the inverse of every bit and add 1
Bitwise inverse of B is !B:
A + !B + 1 = A + (!B + 1) = A + (B) = A  B
Overflow and Carry
Zero Detection
Zero Detection Logic is just a one big NOR gate
Any nonzero input to the NOR gate will cause the output to be zero
The Disadvantage of Ripple Carry
This adder is called a "Ripple Carry Adder"
The carry bit may have to propagate from LSB to MSB
Worst case delay for a Nbit adder: 2Ngate delay
Carry Lookahead
Theory
CarryOut = (B & CarryIn)  (A & CarryIn)  (A & B)
therefore:
Cin2 = Cout1 = (B1 & Cin1)  (A1 & Cin1)  (A1 & B1)
Cin1 = Cout0 = (B0 & Cin0)  (A0 & Cin0)  (A0 & B0)
Substituting Cin1 into Cin2:
Cin2 = (A1 & A0 & B0)  (A1 & A0 & Cin0)  (A1 &
B0 & Cin0)  (B1 & A0 & B0)  (B1 & A0 & Cin0)  (B1
& A0 & Cin0)  (A1 & B1)
Now define two new terms:
Carry generate: gi = Ai & Bi
Carry propagate: pi = Ai xor Bi
We can rewrite:
Cin1 = g0  (p0 & Cin0)
Cin2 = g1  (p1 & g0)  (p1 & p0 & Cin0)
Cin3 = g2  (p2 & g1)  (p2 & p1 & g0)  (p2 & p1 &
p0 & Cin0)
A Partial Carry Lookahead Adder
It is very expensive to build a carry lookahead adder much wider than
8 bits.
therefore
Connect several Nbit Lookahead Adders to form a big adder
E.g. connect four 8bit carry lookahead adders to make a 32bit partial
carry lookahead adder