Designing a Computer









The Pico-computer architecture



Program Counter PC keeps track of current instruction


Arithmetic/logic ALU performs data manipulations - add/sub


Accumulator Acc temporary store for results of ALU


Input port IO interfaces to outside world


Const mux easy access to the constants 0 and 1


Buffer register ABR buffer for the ALU


EQZ TRUE if accumulator is zero


Memory address MAR select a particular address in memory

register


Memory 256 8 bit bytes


Bus 8 bits wide

Design of the ALU


Accepts two numbers from the Bus


Calculates sum or difference - specified by the controller


Stores result in accumulator



Addition:



Use an 8 bit adder


Put one operand on the Bus, assert LDABR to store it in ABR


Put other operand on the Bus


Load result of adder in accumulator by asserting LDACC

Subtraction:


a - b


using 2’s complement notation =>


a + (2’s complement)b



2’s complement b = complement b + 1



Use an Exclusive OR gate as a programmable complementor:



s b EOR

0 0 0

0 1 1

1 0 1

1 1 0


When s = 0 the output is b


When s = 1 the output is


so for a b that is 4 bits wide:



To subtract use the subtract control line as a complement enable

and also as a Carry in to the adder => complement + 1



We now need to add a zero detect circuit to the Accumulator, and a tri-state gate to attach the accumulator to the Bus.


zero detect:



The complete ALU with signals that the controller needs






159.233 Lecture 10 -